In electronic devices, there are many types of memory devices that are utilized for a variety of purposes including, but not limited to, retaining and/or conveying information and/or data, voltage and current manipulation and amplification, and other such purposes. One such memory device is a transistor, for example, a bipolar junction transistor (BJT). A BJT is versatile device and can be implemented in a variety of ways including, but not limited to, an amplifier, a switch, an oscillator, a reference voltage generator, a current controller, and in many other implementations. A typical BJT is a multi layered semiconductor commonly constructed in a three layer configuration, referred to as a PNP or NPN type transistor.
One type of BJT is an NPN type BJT, in which the letters “N” and “P” refer to the majority charge carriers inside the different regions of the transistor. NPN transistors typically consist of a layer of P-doped semiconductor material between two N-doped layers. NPN transistors are commonly operated with the emitter at ground and the collector connected to a positive voltage through an electric lead. A small current entering the base in common-emitter mode is amplified in the collector output.
The bipolar junction transistor (BJT) that has often been used in the reference voltage (Vref) circuit, since the 180 nm node, consists of a high voltage p-well (HVPW) sandwiched between two n regions, hence an NPN type BJT. The bottom n region surrounds the p-region (HVPW) and serves as the collector. It is separated laterally from the top n-region, serving as the emitter, through trench isolation or shallow trench isolation (STI). The bottom of the STI lands in the HVPW and ensures isolation between the emitter and collector. When the base current begins to flow the BJT action is initiated with the current passing vertically from the collector to the emitter. The output of the Vref circuit serves as the reference voltage in the flash die. Hence it is designed such as to produce a fixed reference voltage that is independent of temperature or slight variations in the processing environment.
By virtue of the desire for improved performance and size reduction, smaller sized transistors, e.g., a 90 nm BJT, were exhibiting high and scattered betas, e.g., leakage. While legacy sized transistors, e.g., a 130 nm BJT, showed relatively low scatter values, 90 nm BJTs exhibited scatter values substantially higher. This anomalous BJT behavior was affecting the Vref output on the 90 nm BJT. The Vref output was between 1.4-1.6V with ˜0.1V within wafer variation and about 1V lot-to-lot variation. The expectation however, was ˜1.35V with a <0.1V variation from lot to lot. It is anticipated that further transistor size reduction will exacerbate the above described leakage.
The high scatter value in current BJTs is due to its non-ideal behavior, characterized by high and scattered N-value or ideality factor. The higher collector current for a similar base current was not due to intrinsic vertical BJT action but due to presence of an external current path between the emitter and collector. This current path would manifest at the bottom of the STI between the HVPW-oxide interface/region. Ideally the STI would isolate the collector from the emitter but this isolation was being compromised with the presence of this leakage path between the collector and emitter. Extending the STI deeper into the substrate can compromise the structural integrity of the transmitter.
In terms of a representative circuit, leakage, as a parasitic depletion transistor, occurred between the collector and emitter in parallel to the BJT. The leakage through this parasitic transistor was degrading the BJT and which in turn was compromising the functionality of the voltage reference (Vref) circuit. The parasitic depletion transistor, in parallel to the BJT, is an unintentional by-product of the processing environment. This caused variable characteristics, from wafer to wafer and lot to lot, resulting in fluctuations in the Vref voltage, also from wafer to wafer and lot to lot.